Technical Field
This application is directed to a device for resetting an interpolator and in particular to a device that resets the interpolator when conditions imposed on clock signals driving the interpolator are not met.
Description of the Related Art
Interpolators, including Cascaded Integrator-Comb (CIC) interpolators, operate under the control of clock cycles having different clock frequencies. Typically, an interpolator that increases the sampling rate of input data by a factor of M is driven by two clock signals, whereby the frequency of the first of the two clock signals is an M-integer multiple of the frequency of the second of the two clock signals. Oftentimes, the input data will be sampled at a frequency equal to that of the second clock signal and the output data is desired to be sampled at a frequency that matches that of the first clock signal.
If the frequencies deviate from the M-integer multiple relationship, the timing of the operation of the interpolator will be disrupted resulting in the introduction of a direct current (DC) offset in the output data. The DC offset taints the output data and renders the output data of the interpolator unreliable.